Revision as of 06:00, 19 June 2026

Open source VLSI design notes.

From Verilog/VHDL to GDSII for SKY or IHP technologies.

Prerequisites

These notes assume the host has Linux, e.g. Ubuntu 24.04 set up. All tools will be running under it.

Essential OSS HW design tools

Process development kits (PDK) available for OSS VLSI:

IHP PDK
- Open Source PDK in 130nm BiCMOS, developed for Analog/Digital, Mixed Signal and RF ASIC Design
- ReadTheDocs

The advised path is to setup NIX envbironment and then run openline from there, rather than using a dockerized version.

TODO.

NeoRV32 is an open source MCU with many peripheral options written in VHDL.

@@ Line 9: / Line 9: @@
 These notes assume the host has Linux, e.g. Ubuntu 24.04 set up. All tools will be running under it.
-= Tools =
+= Open Tools =
+Essential OSS HW design tools
+* gtkwave - Waveform viewer
+* iverilog - Icarus Verilog compiler
+* Verilator - compile RTL to C++, faster simulations
+* Yosys - RTL to gate level netlist
+* SymbiFlow - Toolchain to FPGA
+* Magic VLSI - transistor level layout design editor
+* KLayout - viewer and editor of GDSII files
+* OpenRoad - Automates floorplanning, placement, routing and timing.
+* OpenLane - Automated design flow, from verilog to GDSII, uses the tools above.
+== Open Technology PDKs ==
+Process development kits (PDK) available for OSS VLSI:
+* SKY 130 PDK - Process Design Kit by Google and Efabless
+** [https://github.com/google/skywater-pdk GitHub repo]
+** [https://skywater-pdk.readthedocs.io/en/main/rules/device-details.html ReadTheDocs]
+** [https://www.skywatertechnology.com/sky130-open-source-pdk/ Description at SkywaterTechnology, 2023]
+* [https://www.ihp-microelectronics.com/services/research-and-prototyping-service/fast-design-enablement/open-source-pdk IHP PDK]
+** Open Source PDK in 130nm BiCMOS, developed for Analog/Digital, Mixed Signal and RF ASIC Design
+** [https://ihp-open-pdk-docs.readthedocs.io/en/latest/ ReadTheDocs]
 = Setup Openline2 =