Revision history of "DIPb09:PD6"

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  • (cur | prev) 20:37, 12 November 2009‎ Artis (talk | contribs)‎ . . (446 bytes) (+446)‎ . . (New page: * Uzdevums 1: Xilinx ISE vidē izveidot jaunu projektu un tajā realizēt loģisko shēmu Verilog valodā pēc [http://toolbox.xilinx.com/docsan/xilinx92/books/docs/qst/qst.pdf sekojošas]...)
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