Difference between revisions of "Template:DIP saites"

From DiLab
Jump to: navigation, search
(New page: ==== Digital design textbooks @ Digilent Inc.==== * [http://www.synopsys.com/Systems/FPGABasedPrototyping/FPMM/Pages/default.aspx FPGA-Based Prototyping Methodology Manual]: Best practice...)
 
Line 1: Line 1:
= Literatūra =
==== Digital design textbooks @ Digilent Inc.====

* [http://books.google.lv/books?id=1lD9LZRcIZ8C&printsec=frontcover&source=gbs_navlinks_s#v=onepage&q=&f=false Computer organization and design: the hardware/software interface]
** [http://owlhouse.csie.nctu.edu.tw/old/CO2004/ch1-4_old.ppt Computer Organization & Design The Hardware/Software Interface, 2nd Edition] PPT 5.89MB (lekciju slaidi no National Chiao Tung University)
** [http://owlhouse.csie.nctu.edu.tw/old/CO2004/CO2004_lecture_notes.ppt Computer Organization & Design The Hardware/Software Interface, 3nd Edition] PPT 1.86MB (lekciju slaidi no National Chiao Tung University)

* [http://books.google.lv/books?id=57UIPoLt3tkC&printsec=frontcover&source=gbs_v2_summary_r&cad=0#v=onepage&q=&f=false Computer architecture: a quantitative approach]

* [http://books.google.lv/books?id=3aN89DhGwI4C&printsec=frontcover&source=gbs_v2_summary_r&cad=0#v=onepage&q=&f=false The designer's guide to VHDL]


* [http://www.synopsys.com/Systems/FPGABasedPrototyping/FPMM/Pages/default.aspx FPGA-Based Prototyping Methodology Manual]: Best practices in Design-for-Prototyping (FPMM) is a comprehensive and practical guide to using FPGAs as a platform for SoC development and verification.
* [http://www.synopsys.com/Systems/FPGABasedPrototyping/FPMM/Pages/default.aspx FPGA-Based Prototyping Methodology Manual]: Best practices in Design-for-Prototyping (FPMM) is a comprehensive and practical guide to using FPGAs as a platform for SoC development and verification.


=== Digital design textbooks @ Digilent Inc.===

* [http://www.digilentinc.com/Data/Textbooks/Intro_to_Digital_Design-Digilent-Verilog_Online.pdf Introduction to Digital Design - Verilog Edition] PDF 5.81MB
* [http://www.digilentinc.com/Data/Textbooks/Intro_Digital_Design-Digilent-VHDL_Online.pdf Introduction to Digital Design - VHDL Edition] PDF 6.68MB


* Real Digital - A hands-on approach to digital design
* Real Digital - A hands-on approach to digital design
Line 15: Line 29:
** [http://www.digilentinc.com/classroom/realdigital/M10/RealDigital_Module_10.pdf Module 10: The Structural Design of Sequential Circuits] PDF 245.58KB
** [http://www.digilentinc.com/classroom/realdigital/M10/RealDigital_Module_10.pdf Module 10: The Structural Design of Sequential Circuits] PDF 245.58KB


* [http://www.digilentinc.com/Data/Textbooks/Intro_to_Digital_Design-Digilent-Verilog_Online.pdf Introduction to Digital Design - Verilog Edition] PDF 5.81MB
* [http://www.digilentinc.com/Data/Textbooks/Intro_Digital_Design-Digilent-VHDL_Online.pdf Introduction to Digital Design - VHDL Edition] PDF 6.68MB


= Saites =


==== Xilinx produkti (FPGA čipi) ====
=== Xilinx produkti (FPGA čipi) ===


* [http://www.xilinx.com Xilinx kompānijas (FPGA ražotājs) portāls]
* [http://www.xilinx.com Xilinx kompānijas (FPGA ražotājs) portāls]
* [http://www.xilinx.com/support/documentation/data_sheets/ds312.pdf Spartan 3E FPGA Family datasheet]
* [http://www.xilinx.com/support/documentation/data_sheets/ds312.pdf Spartan 3E FPGA Family datasheet]


==== Xilinx attīstītajrīki ====
=== Xilinx attīstītajrīki ===


DiLab ir pieejami sekojoši Xilinx (Digilent) attīstītajrīki:
DiLab ir pieejami sekojoši Xilinx (Digilent) attīstītajrīki:
Line 38: Line 51:




==== Xilinx ISE WebPACK (12.2) ====
=== Xilinx ISE WebPACK (12.2) ===


* [https://secure.xilinx.com/webreg/register.do?group=dlc&htmlfile=&emailFile=&cancellink=&eFrom=&eSubject=&version=12.2&akdm=1&filename=Xilinx_ISE_DS_Lin_12.2_M.63c.1.1.tar Installer for Linux] TAR/GZ 3.02GB (nepieciešams reģistrēties www.xilinx.com)
* [https://secure.xilinx.com/webreg/register.do?group=dlc&htmlfile=&emailFile=&cancellink=&eFrom=&eSubject=&version=12.2&akdm=1&filename=Xilinx_ISE_DS_Lin_12.2_M.63c.1.1.tar Installer for Linux] TAR/GZ 3.02GB (nepieciešams reģistrēties www.xilinx.com)
Line 64: Line 77:
* [http://www.fpga4fun.com/PongGame.html Pong Game] by Jean P. Nicolle
* [http://www.fpga4fun.com/PongGame.html Pong Game] by Jean P. Nicolle


=== HDL tutorials ===
== HDL tutorials ==


<!-- (unavailable) * [http://www.eecs.harvard.edu/cs141/resources/verilog-tutorial.pdf Verilog Tutorial I (10 pages)] PDF 69.58KB -->
<!-- (unavailable) * [http://www.eecs.harvard.edu/cs141/resources/verilog-tutorial.pdf Verilog Tutorial I (10 pages)] PDF 69.58KB -->
Line 78: Line 91:
** [http://lslwww.epfl.ch/pages/teaching/cours_lsl/sl_info/vhdl-tutorial.pdf VHDL Tutorial II (84 pages)] PDF 391.95KB
** [http://lslwww.epfl.ch/pages/teaching/cours_lsl/sl_info/vhdl-tutorial.pdf VHDL Tutorial II (84 pages)] PDF 391.95KB


=== IP cores priekš FPGA ===
== IP cores priekš FPGA ==


* [http://www.latticesemi.com/products/intellectualproperty/ipcores/mico32/index.cfm LatticeMicro 32] soft-procesors
* [http://www.latticesemi.com/products/intellectualproperty/ipcores/mico32/index.cfm LatticeMicro 32] soft-procesors




=== Citi kursi un saites ===
== Citi kursi un saites ==


* [http://tams-www.informatik.uni-hamburg.de/applets/hades/webdemos/toc.html Hades demonstration applets]
* [http://tams-www.informatik.uni-hamburg.de/applets/hades/webdemos/toc.html Hades demonstration applets]
Line 93: Line 106:
* http://www.presentationzen.com/presentationzen/2007/03/a_few_weeks_ago.html
* http://www.presentationzen.com/presentationzen/2007/03/a_few_weeks_ago.html
* http://www.presentationzen.com/
* http://www.presentationzen.com/

== Atsauksmes par kursu ==
* DIP 2012-1-m: [http://bit.ly/MVbhuZ] [http://bit.ly/Lvsur2] [http://bit.ly/MX4Upj]

== Dažādi ==
* [http://www.cpushack.com/ CPU Shack]

Revision as of 19:11, 11 November 2013

Literatūra


Digital design textbooks @ Digilent Inc.


Saites

Xilinx produkti (FPGA čipi)

Xilinx attīstītajrīki

DiLab ir pieejami sekojoši Xilinx (Digilent) attīstītajrīki:


Xilinx ISE WebPACK (12.2)


Video applications using FPGA

HDL tutorials

IP cores priekš FPGA


Citi kursi un saites


Ieteikumi prezentāciju veidošanā

Atsauksmes par kursu

Dažādi