Difference between revisions of "BITL MCU"
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[[#{{CURRENTDAY2}}.{{CURRENTMONTH}}.{{CURRENTYEAR}} | Today <small>(if there is a class)</small>]] |
[[#{{CURRENTDAY2}}.{{CURRENTMONTH}}.{{CURRENTYEAR}} | Today <small>(if there is a class)</small>]] |
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'''Course: Introduction to Processors''' |
'''Course: Introduction to Processors''' |
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===Introduction=== |
===Introduction=== |
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Representation of non-negative numbers in hardware, registers and memory. Decimal, binary, octal, and hexadecimal systems. Converting between the systems. |
Representation of non-negative numbers in hardware, registers and memory. Decimal, binary, octal, and hexadecimal systems. Converting between the systems. |
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|<big>'''Two's complement'''</big> |
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Representing negative numbers in hardware. Register size, and why it is important. Methods for encoding negative numbers: packed, signed, bias, one's complement and two's complement. Converting between the value and two's complement in binary and hexadecimal systems. |
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|<big>'''Lab :: Quiz 1'''</big> |
|<big>'''Lab :: Quiz 1'''</big> |
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'''Lab''' |
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Practicing the conversion between the systems with different bases |
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'''Quiz 1''' |
'''Quiz 1''' |
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Decimal, binary, octal and hexadecimal systems. |
Decimal, binary, octal and hexadecimal systems. |
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'''Lab''' |
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Quiz review. Practicing the conversion between the systems with different bases |
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|<big>''' |
|<big>'''Processor architecture'''</big> |
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Architecture of a processor. Registers, register file, ALU, datapath. CISC vs. RISC architectures. x86 architecture as CISC representative. ARM architecture as RISC. Instruction encoding. |
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Representing negative numbers in hardware. Register size, and why it is important. Methods for encoding negative numbers: packed, signed, bias, one's complement and two's complement. Converting between the value and two's complement in binary and hexadecimal systems. |
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|<big>'''Lab :: Quiz 2'''</big> |
|<big>'''Lab :: Quiz 2'''</big> |
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'''Lab''' |
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Exercises with the two's complement |
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'''Quiz 2''' |
'''Quiz 2''' |
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Two's complement. |
Two's complement. |
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'''Lab''' |
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Quiz review. Exercises with the two's complement |
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|<big>''' |
|<big>'''Computing environment'''</big> |
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Environment and tools for compiling and debugging Assembly programs. Compiler, preprocessor, assembly, linker, loader, debugger. Cross-compilation and toolchains. Emulators and virtual machines. |
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Architecture of a processor. Registers, register file, ALU, datapath. CISC vs. RISC architectures. x86 architecture as CISC representative. ARM architecture as RISC. Instruction encoding. |
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====29.09.2023==== |
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|<big>''' |
|<big>'''ARM Assembly and arithmetic'''</big> |
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Introduction to ARM Assembly language and programming. Instruction types. Arithmetic instructions. MOV, ADD, SUB. MVN, ADC, SBC, RSB, RSC. Barrel Shifter. |
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Environment and tools for compiling and debugging Assembly programs. Compiler, preprocessor, assembly, linker, loader, debugger. Cross-compilation and toolchains. Emulators and virtual machines. |
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* HW1 announced |
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====29.09.2023==== |
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====06.10.2023==== |
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|<big>''' |
|<big>'''Flow control and tests'''</big> |
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Flow control in Assembly. Branch instructions. B, BL, BX, BLX. Working directly with PC register. CPSR flags. Condition field. Bit operations. AND, ORR, EOR, BIC, shift and rotation. CMP, CMN, TST, TEQ. Fast flags and the S postfix. |
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Introduction to ARM Assembly language and programming. Instruction types. Arithmetic instructions. MOV, ADD, SUB. MVN, ADC, SBC, RSB, RSC. Barrel Shifter. |
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====06.10.2023==== |
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====13.10.2023==== |
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|<big>''' |
|<big>'''Memory instructions'''</big> |
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Reading and writing data to memory. Memory access instructions. STR, LDR, STRB, STRH, LDRB, LDRH, LDRSB, LDRSH. Addressing modes: offset, pre-indexed and post-indexed. Using barrel shifter with addressing. Data alignment in memory. |
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Flow control in Assembly. Branch instructions. B, BL, BX, BLX. Working directly with PC register. CPSR flags. Condition field. Bit operations. AND, ORR, EOR, BIC, shift and rotation. CMP, CMN, TST, TEQ. Fast flags and the S postfix. |
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* '''Due''' '''HW1''' |
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* HW2 announced |
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|<big>'''Lab :: Quiz 3'''</big> |
|<big>'''Lab :: Quiz 3'''</big> |
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'''Lab''' |
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'''Quiz 3''' |
'''Quiz 3''' |
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Code comprehension. |
Code comprehension. |
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'''Lab''' |
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Quiz review. |
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* '''Due''' '''HW1''' - Arithmetic progression |
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|<big>''' |
|<big>'''Calling subroutines and interfacing with C'''</big> |
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Variable types in C: static, automatic and dynamic. Calling subroutines and parameter passing conventions. Parameters and return value. Stack and registers. Saving the registers, the context. Loading and storing multiple registers: LDM, STM. Interfacing between Assembly and C. |
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Reading and writing data to memory. Memory access instructions. STR, LDR, STRB, STRH, LDRB, LDRH, LDRSB, LDRSH. Addressing modes: offset, pre-indexed and post-indexed. Using barrel shifter with addressing. Data alignment in memory. |
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|<big>''' |
|<big>'''Symbols'''</big> |
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Symbol encoding in hardware and software. Code tables. ASCII. EBCDIC. ISO code tables. Foreign letter symbols. UTF-8, UTF-16. Strings in C and memory. Converting values to symbols and strings. |
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Variable types in C: static, automatic and dynamic. Calling subroutines and parameter passing conventions. Parameters and return value. Stack and registers. Saving the registers, the context. Loading and storing multiple registers: LDM, STM. Interfacing between Assembly and C. |
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* '''Due''' '''HW2''' |
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|<big>''' |
|<big>'''Midterm'''</big> |
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Data representation in memory. |
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Symbol encoding in hardware and software. Code tables. ASCII. EBCDIC. ISO code tables. Foreign letter symbols. UTF-8, UTF-16. Strings in C and memory. Converting values to symbols and strings. |
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Assembly code comprehension. |
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Two programming tasks. |
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* '''Due''' '''HW2''' - Matrix multiplication |
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|<big>''' |
|<big>'''Expressions and Macro commands'''</big> |
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Expressions in Assembly. Operators in expressions. Constants. Assigning values to symbols. Directives: .set, .equiv, .eqv. Conditional compilation. Directives .if, .ifdef, .endif., ifb, .ifc, .ifeqs. More conditionals .ifeq, .ifge, .ifne and others. Macro commands: .macro, .endm., .rept. Recursive macros. Local macros. Macros across sections. |
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Data representation in memory. |
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Assembly code comprehension. |
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Two programming tasks. |
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* '''Due''' '''M1P1''' - Midterm 1 programming task 1, tested |
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* '''Due''' '''M1P2''' - Midterm 1 programming task 2, tested |
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* Project announced |
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|<big>''' |
|<big>'''Lab'''</big> |
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Midterm review. |
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Expressions in Assembly. Operators in expressions. Constants. Assigning values to symbols. Directives: .set, .equiv, .eqv. Conditional compilation. Directives .if, .ifdef, .endif., ifb, .ifc, .ifeqs. More conditionals .ifeq, .ifge, .ifne and others. Macro commands: .macro, .endm., .rept. Recursive macros. Local macros. Macros across sections. |
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* '''Due''' '''M1P1''' - Midterm 1 programming task 1, tested |
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* '''Due''' '''M1P2''' - Midterm 1 programming task 2, tested |
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|<big>'''Lab'''</big> |
|<big>'''Lab'''</big> |
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Lab. Q&A session |
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Midterm review. |
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Latest revision as of 20:14, 5 October 2023
Shortcuts: Calendar | Assignments | Resources | Today (if there is a class)
Course: Introduction to Processors
Introduction
The course is about low level hardware architecture of the computers and the programming at that level. In particular, we study ARM Assembly programming language and techniques while discussing the microprocessor resources and features that implement the instructions. The students learn how to develop a code in Assembly and what to consider when implementing efficient programs in higher level languages.
Deliverables
- All assignments are due by the end of the day on the due date, unless otherwise specified.
Calendar
Date | Topic, content | Deliverables | |
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01.09.20239:00 |
Microprocessors and microcontrollers. Applications. Architectures. Coourse outline. |
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01.09.202311:10 |
Representation of non-negative numbers in hardware, registers and memory. Decimal, binary, octal, and hexadecimal systems. Converting between the systems. |
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08.09.20239:00 |
Representing negative numbers in hardware. Register size, and why it is important. Methods for encoding negative numbers: packed, signed, bias, one's complement and two's complement. Converting between the value and two's complement in binary and hexadecimal systems.
|
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08.09.202311:10 |
Quiz 1 Decimal, binary, octal and hexadecimal systems. Lab Quiz review. Practicing the conversion between the systems with different bases |
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15.09.20239:00 |
Architecture of a processor. Registers, register file, ALU, datapath. CISC vs. RISC architectures. x86 architecture as CISC representative. ARM architecture as RISC. Instruction encoding. |
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15.09.202311:10 |
Quiz 2 Two's complement. Lab Quiz review. Exercises with the two's complement |
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22.09.20239:00 |
Environment and tools for compiling and debugging Assembly programs. Compiler, preprocessor, assembly, linker, loader, debugger. Cross-compilation and toolchains. Emulators and virtual machines. |
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22.09.202311:10 |
Developing and testing a simple Assembly program. Using cross-compilation tools. Introduction to the Make system. |
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29.09.20239:00 |
Introduction to ARM Assembly language and programming. Instruction types. Arithmetic instructions. MOV, ADD, SUB. MVN, ADC, SBC, RSB, RSC. Barrel Shifter. |
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29.09.202311:10 |
Advanced features of the Make system. |
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06.10.20239:00 |
Flow control in Assembly. Branch instructions. B, BL, BX, BLX. Working directly with PC register. CPSR flags. Condition field. Bit operations. AND, ORR, EOR, BIC, shift and rotation. CMP, CMN, TST, TEQ. Fast flags and the S postfix. |
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06.10.202311:10 |
Evaluating and following the code "on paper". |
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13.10.20239:00 |
Reading and writing data to memory. Memory access instructions. STR, LDR, STRB, STRH, LDRB, LDRH, LDRSB, LDRSH. Addressing modes: offset, pre-indexed and post-indexed. Using barrel shifter with addressing. Data alignment in memory. |
| |
13.10.202311:10 |
Quiz 3 Code comprehension. Lab Quiz review. |
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20.10.20239:00 |
Variable types in C: static, automatic and dynamic. Calling subroutines and parameter passing conventions. Parameters and return value. Stack and registers. Saving the registers, the context. Loading and storing multiple registers: LDM, STM. Interfacing between Assembly and C. |
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20.10.202311:10 |
Debugging Assembly programs. Gnu debugger gdb. |
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27.10.20239:00 |
Symbol encoding in hardware and software. Code tables. ASCII. EBCDIC. ISO code tables. Foreign letter symbols. UTF-8, UTF-16. Strings in C and memory. Converting values to symbols and strings. |
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27.10.202311:10 |
Practice passing parameters and working with buffers. |
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03.11.20239:00 |
Data representation in memory. Assembly code comprehension. Two programming tasks. |
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10.11.202311:10 |
Expressions in Assembly. Operators in expressions. Constants. Assigning values to symbols. Directives: .set, .equiv, .eqv. Conditional compilation. Directives .if, .ifdef, .endif., ifb, .ifc, .ifeqs. More conditionals .ifeq, .ifge, .ifne and others. Macro commands: .macro, .endm., .rept. Recursive macros. Local macros. Macros across sections. |
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10.11.202311:10 |
Midterm review. |
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17.11.20239:00 |
Including Assembly in C code. Inline code and Assembly code operands. Tasks for the compiler, linker and loader. Dynamic loaders and libraries. |
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17.11.202311:10 |
Lab. Q&A session |
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24.11.20239:00 |
Execution time for instructions. Case study for code optimization. Leveraging the documentation and specification of instructions. Reordering the code. Unrolling loops. Taking advantage of branch prediction. Cache memory and the code performance. Documentation: Intel XScale R Core Developer’s Manual. The section and focus:
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Due: Choose the format of your exam: Project vs. Test. | |
24.11.202311:10 |
Review of the course topics |
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11-21.12.2023 |
Time for exams |
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15.12.20239:00 |
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Assignments
- Homeworks are available from e-Studijas
Resources
Tutorials
- Setting up ARM development environment on Ubuntu
Make
GDB
- GDB tutorial from UMD
- GDB getting started tutorial
- GDB commands in short from PDX
- GDB manual
Remote debugging example
Debugging myprog with a parameter 10.
- First, start the qemu emulator, providing the communications port (12345), and run it in background (&).
- Before you do this, make sure that the port is not in use by anyone or anything.
- Then start the gdb-multiarch with the name of the program and
- Use the gdb command "remote target" with address (localhost) and the port (12345).
- Finally start the program execution with "continue". Perhaps, you may want to set some breakpoints before that.
$ qemu-arm -L /usr/arm-linux-gnueabi -g 12345 myprog 10 & $ gdb-multiarch myprog (gdb) target remote localhost:12345 (gdb) continue
A few essential GDB commands
GDB command | Shortcut | Description |
run | Run the program from the beginning | |
continue | c | Continue (or start) the execution of the program |
step | s | Execute the current line from the source. If there is a function call, step into it.
This command can have a parameter n that tells how many steps to make. |
next | n | Execute the current line from the source. If there is a function call, stop after running it.
This command can have a parameter n that tells how many steps to make. |
break <x> | b <x> |
Set a "breakpoint" to <x>, where <x> could be:
|
list | l | Shows the source code (lines). Could be followed by a function_name or file:line_number |
info registers | i r | Prints all registers and their values. Can be followed by one or more register names. |
set step mode on | Set running mode such that "step" will enter the code that has no debug information available.
Using "off" instead of "on" resets this mode. |
ARM
- ARM instruction set quick reference - from U.Wisconsin.
- A32 instruction summary
- Application Binary Interface (ABI) for the Arm architecture
- ARM A32 instruction set. Note, that ARM has several instruction sets described here
Xscale
- Intel XScale Microarchitecture Assembly Language Quick Reference Card ARM Instruction Set, Intel Corporation, 2001
- Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Developer’s Manual, ON: 252480-006US, Intel Corporation, 2006
- Intel XScale(R) Core Developer’s Manual
- Intel XScale R Core Developer’s Manual, ON: 273473-002, Intel Corporation, 2004
Insights
- Teach yourself programming in 10 years by Peter Norvig
- Should I learn assembly language to program a microcontroller? - Answer on Quora by software R&D professional with 40 years of experience.